CLOCK DIVIDER divides a clock signal down by 1 thru 256 with four outputs for 2-64 divisions, and two outs for 1, 128, and 256.
 
CLOCK DIVIDER uses a 4000 series CMOS ripple counter for stable analog divisions. 
Each division has a red LED that illuminates while the gate output for that division is high.
A yellow RESET LED illuminates with a reset gate.

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width: 10hp    depth: 33mm    6ma +12v

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